发明名称 THREE-STATE OUTPUT CIRCUIT
摘要 PURPOSE:To operate a titled circuit at a high speed and with low power consumption by connecting a power supply and an MOSFET in series and controlling the MOSFET connected between an FET gate and the power supply and a transfer gate for an input signal by an output controlling signal or its inversion signal. CONSTITUTION:A p channel type MOSFET Q31 and an n channel type MOSFET Q32 are connected in series between the power supplies VDD and VSS. A p type MOSFET Q33 is connected between the gate of the FET Q31 and the power supply VDD and its connection is controlled by an output controlling signal OE. An n channel type MOSFET Q34 is connected between the gate of the FET Q32 and the power supply VSS to control the connection of the signal OE through an inverter 31. An input signal IN is supplied to FETs Q31, Q32 through transmission gates 32, 33 and the gates 32, 33 are controlled by the signal OE and a signal obtained through the inverter 31. A three-state output signal OUT is taken out from the connection point between the FETs Q31, Q32 to drive a negative capacitor C31. Thus, the titled circuit can be operated at a high speed and with low power consumption.
申请公布号 JPS5970020(A) 申请公布日期 1984.04.20
申请号 JP19820179308 申请日期 1982.10.13
申请人 TOSHIBA KK 发明人 WATANABE SEIJI;MATSUKI KOUJI
分类号 H03K19/0175;H03K19/094 主分类号 H03K19/0175
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