发明名称 DIGITAL SIGNAL RECEIVING CIRCUIT
摘要 PURPOSE:To attain accurate receiving, by comparing an input signal with a delayed signal in a digital signal receiving circuit. CONSTITUTION:The input signal applied to an input terminal 10 is branched into three signals; one is amplified 1 as it is, other is amplified 4 (double amplication factor of that of an amplifier 1) after a delay 2 by T1, and the rest is amplified 5 (the same amplification factor as the amplifier 1) after a delay 3 by T2. The T1 and the T2 have the relation of T1<T2<Tmin, where Tmin is the minimum pulse width of the pulse. The three branched signals are compared at comparator circuits 6, 7, ANDed 8 and a waveshaped output is obtained at a terminal 11.
申请公布号 JPS5970342(A) 申请公布日期 1984.04.20
申请号 JP19820181974 申请日期 1982.10.15
申请人 MATSUSHITA DENKO KK 发明人 FUJII YASUHIRO;YAMASHITA KOUJI;OKAMOTO KUNINORI;MIYASHITA HITOSHI
分类号 H04L25/03;H04L25/06 主分类号 H04L25/03
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