发明名称 INTEGRATED CIRCUIT PACKAGE
摘要 The package (21) has ceramic substrate layers 22, 22 min , 22 sec , 22'''. Terminal steps 19 for connection to a mother board (40) are provided in a lattice array over the bottom surface of bottom layer 22'''. The terminal steps 19 are connected to internal bonding pads 26 to which contacts of a semiconductor device are connected by way of wiring 27, 32, 33 on surfaces of the layers 22 min , 22 sec , 23''' and by way of through holes 24 in the layers.
申请公布号 DE3067005(D1) 申请公布日期 1984.04.19
申请号 DE19803067005 申请日期 1980.09.29
申请人 FUJITSU LIMITED 发明人 AKASAKI, HIDEHIKO
分类号 H01L23/12;H01L23/055;H01L23/498;H01L23/50;H01L23/538;H05K3/34 主分类号 H01L23/12
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