| 摘要 |
PURPOSE:To prevent mis-readout of data, by forming an equalizing signal having different timing so that each equalizing switch is operated by a delay in a sense system at data readout, allowing to attain the most effective equalizing. CONSTITUTION:Equalizing signals phie1, phie2, phie3 applied to equalizing switches Qe1, Qe2, Qe3 from equalizing drivers 5, 6, 8 and a control signal phic to an output buffer 9 are outputted with a little delay in matching with the delay of each section of the sense system. Thus, common data lines CD, CD' and a sense circuit 7 are equalized with a delay for the sense system and the equalization to each section is attained most effectively, to prevent mis-readout. Since the driver is provided at each equalizing switch, the load is decreased and the driver is reduced accordingly. |
