发明名称 LSI FOR ANALOG-DIGITAL CONVERSION
摘要 PURPOSE:To reduce considerably current consumption and to stabilize the instable display caused by the intermittent operation by means of a display hold by operating intermittently an operational amplifier using most of the current consumption of an A/D conversion LSI. CONSTITUTION:A gate voltage VG of an operational amplifier 21 is turned off (Vss level) or on at a prescribed interval in this invention. In Fig. 22, the level is at High as long as 4 seconds in 64sec with an output of an AND gate 16 and a switch 17 is turned on. The waveform 23 is a VG voltage applied to the operational amplifier and the potential is increased from VSS to the VG in the timing as same as that of the waveform 22. The waveform 24 shows an output of the operational amplifier and the output is sampled eight times for 4sec. The waveform 25 shows the timing of a latch signal and the timing is obtained when the sampling of the waveform 24 is finished. Since the latch signal appears once for 64sec and only the result of final sampling of the A/D conversion is latched, the display becomes an accurate data. The waveform 26 indicates the hold period, the display data is rewritten when the latch signal is outputted and the display value is held until the next latch signal is outputted.
申请公布号 JPS5967720(A) 申请公布日期 1984.04.17
申请号 JP19820177426 申请日期 1982.10.08
申请人 SHIOJIRI KOGYO KK 发明人 TEZUKA MUTSUTO
分类号 H03M1/12 主分类号 H03M1/12
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