发明名称 FLOATING POINT MULTIPLIER
摘要 PURPOSE:To obtain a single-precision data multiplication result speedily with high precision eventually as the multiplication result of double-precision data, by arraying addition results and multiplication results in double-precision data format. CONSTITUTION:Multiplication data is inputted to a multiplier 10 by a 32-bit multiplier left input signal bus 14 and a 32-bit multiplier left input signal bus 15. The 32 upper bits of the multiplication result is outputted to an adder left input signal bus 12 and a register file through buses 16, 21, and 18, and the 32 lower bits, on the other hand, are outputted to an adder 11 through a signal line 22 as the 32 left input bits. Input to the adder 11 performed through buses 12 and 13. The 32 upper bits of the addition result are sent out to the register file and an adder left input signal bus 13 through the bus 16 and signal lines 17 and 20, and the 32 lower bits are inputted as a left input directly to the adder 11 through a signal line 19.
申请公布号 JPS5968058(A) 申请公布日期 1984.04.17
申请号 JP19820178494 申请日期 1982.10.13
申请人 HITACHI SEISAKUSHO KK 发明人 ABE SHIGEO;BANDOU TADAAKI;TAKAHASHI MASAO;MATSUMOTO HIDEKAZU;HARA HIDEYUKI
分类号 G06F7/487;G06F7/00;G06F7/508;G06F7/52;G06F7/527;G06F7/53;G06F7/76;G06F17/16 主分类号 G06F7/487
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