发明名称 Page addressing mechanism
摘要 In a computer system, paging operates and a method of use thereof are provided for extending the addressing capability of a processor by using a page register. The page register includes means for storing different codes for different operations to be performed on the memory. The memory is divided into four groups of memory within 2n addresses such that there is paged and unpaged ROM and pages and unpaged RAM. The unpaged ROM and RAM include only a single block which is directly addressed by the n bit address bus. The paged ROM and RAM includes a plurality of blocks or pages, one of which is selected to be addressed by the page register. The page register responds to the address bus and to signals from the processor defining the memory operation to be performed by providing page signals, selecting one page of paged memory. The method of using the paging apparatus includes creating a table in the unpaged RAM of all routines in the paged memory blocks and using the table to transfer from one routine to another. Within the table is a code identifying the page in which the new routine exists and an offset into that page used to determine the address in that page of the new routine.
申请公布号 US4443847(A) 申请公布日期 1984.04.17
申请号 US19810231653 申请日期 1981.02.05
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BRADLEY, DAVID J.;EGGEBRECHT, LEWIS C.;GIBBS, DENNIS S.;KOSTUCH, DONALD J.
分类号 G06F12/06;G06F9/34;G06F12/10;(IPC1-7):G06F9/30 主分类号 G06F12/06
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