| 摘要 |
PURPOSE:To manufacture easily a high speed and highly integrated MOSLSI by obtaining a delay circuit where the design change in the delay time is easily made possible for each of input leading and trailing and the layout area can be made small. CONSTITUTION:A capacitor CLL is assumed as a load. When a leading signal is inputted to an input terminal lin, a PMOS turns off and an NMOS turns on. The electric charge stored in the capacitor CL is discharged through NMOSTN1, TN2-TNn. The TN1 acts like a switching element and the TN2-TNn act like resistive elements slowing down the discharge speed. When a trailing signal is inputted to the said lin, the NMOS is turned off and the PMOS turns on. The capacitor CL is charged through the TPn-TP2, TP1. The TP1 acts like a switching element and the TP2-TPn act like resistive elements. The change of the delay time in such a delay circuit is easily made by changing the number of the delay elements TP1-TPn and TN1-TNn, and the layout is attained within a comparatively small area. |
