| 摘要 |
PURPOSE:To readily manufacture a semiconductor memory by composing a semiconductor substrate of a semiconductor substrate of the first conductive type, a semiconductor layer of the second conductive type formed with the source and drain regions of the first conductive type, and a resistance layer of the first conductive type of low density formed on the semiconductor layer of the groove side face to become isolating region. CONSTITUTION:A p type semiconductor layer 23 is formed on an n type semiconductor substrate 22, a groove 25 becoming an isolating region is formed, n<+> type layers 181-185 as source and drain regions of drive MOS transistors Q1, Q2 and transfer MOS transistors Q3, Q4 are formed on the surface of isolated p type semiconductor layer 23, a gate electrode 271 is connected through a buried contacting hole 301 with a drain region 283, a gate electrode 272 is connected through a buried contacting hole 302 with a drain region 282, and n<-> type diffused resistance layers 311, 312 for respectively connecting at one ends to the sides of the grooves 25 to the substrate 22 and at the other to the regions 282, 283 are formed. Since the layers 311, 312 are formed on the layer 23 having good crystallinity, the controllability in the resistance value can be improved. |
