发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To reduce the influence of a surface depletion layer and elevate drain withstand voltages by a method wherein the distance between a source electrode and gate electrode in a Schottky barrier gate type FET is not more than 1.0mum, ohmic electrodes for the gate, source, and drain are produced by self-alignment, and the gate electrode is formed offset. CONSTITUTION:An SiO2 substrate 22 is side-etched for the formation of an opening 26 larger than an opening 25, an Al layer 21 is side-etched for the formation of an opening 27 larger than the opening 26, and a gate electrode 1 is formed, through evaporation of Al, with its size determined by the opening 25. On the gate electrode 1, SiO is heat-evaporated for the formation of a coating layer 28 with its shape dependent upon the opening 26 in the second layer. The gate electrode 1 as covered by a coating layer 28 is retained when the Al layer 21 is removed. Application by evaporation of an ohmic metal results in the formation of a source and drain electrodes 2, 3 by self-alignment, separated from the coating layer 28. The distance between the gate and source and that between the gate and drain are different in the produced GaAs MESFET as the gate electrode is located offset.
申请公布号 JPS5965485(A) 申请公布日期 1984.04.13
申请号 JP19820175012 申请日期 1982.10.05
申请人 NIPPON DENKI KK 发明人 ASAI SHIYUUJI
分类号 H01L29/812;H01L21/338;H01L29/417;H01L29/80 主分类号 H01L29/812
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