发明名称 AUTOMATICALLY ADJUSTABLE CHIP DESIGN METHOD
摘要 A method and system for use with high speed automated electron beam systems in the fabrication of LSI and VLSI circuit chips whereby the dimensions which define the physical sizes of the elements that make up the circuit patterns of the chip can be easily modified to meet the requirements of different wafer processing facilities. A concept of pseudo apertures is employed to define the patterns to be exposed by the electron beam system, even though electron beam systems do not use apertures in the exposing process. A group of shapes that may be exposed by the electron beam system are defined. These shapes, which function as the pseudo apertures, are then layed out on a grid system, (70, 72) according to established lay out rules, in order to realize a desired circuit pattern. Data specifying the shapes that have been combined to form each pattern are compiled in an aperture table. The data of the aperture table are then used to generate appropriate control signals to cause the electron beam to scan the desired pattern. Changes can readily be made to the data in the aperture tables, as well as the grid systems, (70, 72) thereby changing the dimensions and orientation of the circuit patterns as needed.
申请公布号 WO8401454(A1) 申请公布日期 1984.04.12
申请号 WO1983US01541 申请日期 1983.09.27
申请人 STORAGE TECHNOLOGY PARTNERS 发明人 ZASIO, JOHN, J.
分类号 G03F7/20;H01J37/317;H01L21/027;H01L21/82;H01L27/02;(IPC1-7):06F15/46 主分类号 G03F7/20
代理机构 代理人
主权项
地址