| 摘要 |
PURPOSE:To diagnose a memory at a high speed with high reliability, by providing a comparing circuit to diagnose plural memory blocks, where the same data is written, simultaneously. CONSTITUTION:In case that the same data is written on a memory 1, a memory write signal WR is applied to a gate 12, and the signal on a data bus 2 is written on the memory 1. If the test mode is not designated, a memory read signal RD is set to the low level to open a gate 13 for the purpose of reading contents of the memory 1, and a gate 11 is opened by the output of the gate 13 to transmit contents of the memory 1 to the data bus 2. If the test mode is designated, the memory read signal RD is cut in the gate 13 by a test mode designating signal Tn, and contents of the memory 1 are not flowed to the data bus 2. If the data mode is designated, gates 11 and 12 are turned off, and contents of the memory 1 and the data bus 2 are compared with each other in an exclusive OR gate 14, and the difference between contents of the memory and those of the data bus is detected by the output of a gate 14. |
