发明名称 REPEATING INSTALLATION OF MULTI-PHASE DIGITAL SIGNAL
摘要 PURPOSE:To attain the insertion and extraction of a subsignal by providing the receiving side with a demodulator, a differential converting circuit, a code converting circuit, frame synchronizing circuit, and a subsignal extracting circuit and also providing the transmitting side with a code converting circuit, a signal selecting circuit and a modulator. CONSTITUTION:Base band signals S11, S12 demodulated by a demodulator 15 are inputted to the differential converting circuit 16. Base band signals S21, S22 are inputted to the code converting circuit 18. The outputs of the circuits 16, 18 are synchronized with each other by the frame synchronizing circuit 17 and a frame timing pulse is extracted from the circuit 17. The pulse signal and the output of the circuit 18 are inputted to the subsignal extracting circuit 20 and a digital service channel DSC signal is extracted. The DSC signal inputted to the code converting circuit 19 is converted at tis code and inputted to the signal selecting circuit 21. Any one of the DSC signal code-converted by the circuit 21 and the signals S21, S22 is selected by the value of the frame timing pulse and the selected signal is inputted to the modulator 22. When the frame timing pulse is ''1'', the DSC signal is converted at its code and the code-converted signal is inserted into the main signal.
申请公布号 JPS5961256(A) 申请公布日期 1984.04.07
申请号 JP19820170088 申请日期 1982.09.29
申请人 NIPPON DENKI KK 发明人 HASEGAWA MASATO
分类号 H04L27/18;H04L27/34 主分类号 H04L27/18
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