| 摘要 |
PURPOSE:To set the number of stages and parallelism of a pipeline by connecting input buses of plural processor groups by switches in common or connecting the input/output buses of adjacent processor groups adequately. CONSTITUTION:Movable contacts S21-Sn1 constituting switches S2-Sn are provided to input buses I2-In of processor groups 212-21n constituting titled array processor device. Switches S2-Sn1 are provided. One-side fixed contacts S22-Sn2 of those switches S2-Sn2 are connected to other-end parts of output buses O1-On-1 of the processor groups 211-21n-1. The other-side contacts S23- Sn3 of the switches S2-Sn are connected to the input bus I1 of the processor group 211. This input bus I1 is connected to a mass-storage memory 23 through an input/output control part 22. |
