发明名称 IC MEMORY
摘要 PURPOSE:To erase easily the storage of all areas with a simple constitution, by inpressing an erase signal and inhibiting refresh operation for a prescribed period. CONSTITUTION:An erase signal is impressed to a refresh timer and counter section 11, and an NAND gate 12 for a prescribed period until the stored charge of the storage capacity of each cell of a memory cell matrix 1 is discharged. Then, a control signal to a system/refresh selecting section 7, a chip decoding section 8, and an interface control section 9 is not outputted from the counter section 11, write/readout is inhibited and the access of the cell 1 by a load address buffer 4 is inihibited via a gate 12. All the storage is erased easily and quickly with a simple constitution, by means of the system inhibiting the refresh for a prescribed time without accessing each memory.
申请公布号 JPS5958691(A) 申请公布日期 1984.04.04
申请号 JP19820168958 申请日期 1982.09.28
申请人 FUJITSU KK 发明人 NAKAMURA KAN
分类号 G11C11/401;G11C11/34;(IPC1-7):11C11/34 主分类号 G11C11/401
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