发明名称 PHASE LOCK SYSTEM
摘要 <p>PHASE LOCK SYSTEM A second-order phase-locked loop circuit which does not require error voltage amplification is described. The output of a voltage controlled oscillator is accurately phase locked to a reference pulse. The loop phase detector is periodically enabled by a pulse generator and draws current only when enabled. Therefore very little noise may be coupled to the voltage controlled oscillator. The phase detector incorporates a current amplifier which allows very accurate establishment of the instant phase comparison takes place.</p>
申请公布号 CA1164963(A) 申请公布日期 1984.04.03
申请号 CA19800367663 申请日期 1980.12.29
申请人 TEKTRONIX, INC. 发明人 CROSBY, PHILIP S.
分类号 H03L7/08;H03L7/085;(IPC1-7):H03L7/08 主分类号 H03L7/08
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