| 摘要 |
<p>PHN. 9736 49 A multi-source/receiver data processing system comprising a communication bus which consists of at least one transfer medium. Clock signal generators have different tolerances with respect to each other. In order to prevent sources and/or receivers having a slow clock signal generator from being excluded as rightful participants from an action concerning a communication, there are provided means whereby it can be determined whether said bus is "ready" for executing said action. The means comprise first and second detecting means whereby it can be determined that the communication bus is "ready" during a first and a second period of time, respectively. When an active participant determines that this second period of time has expired, the bus is indeed ready for this active participant and all further active participant which have meanwhile determined during their first period of time that the bus is ready, so the bus can be occupied by this action. A data source and/or data receiver may be a programmed digital signal processor.</p> |
