发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To improve the integration degree by a method wherein a polycrystalline Si layer formed simultaneously with the gate of an Si gate MOS transistor Tr is decided as the first wiring layer, and then the film of an Si thermal oxide film is formed on the outer peripheral surface of the wiring layer by heat treatment in an oxidizing atmosphere. CONSTITUTION:Si oxide films 2 are formed on a P type Si substrate 1, and P<+> Si layers 3 which prevent the generation of a parasitic MOS are formed under the films 2. A polycrystalline Si layer 7, the gate electrode, covered with an Si thermal oxide film 6 is arranged between a source layer 4 and a drain layer 5, and the Si gate MOS transistor MOS Tr8 is formed. The polycrystalline Si layers 9 and 10 serving as the first wiring layers are formed on the film 2. The Si thermal oxide film 12 is formed in the outer peripheral surfaces of the layers 9 and 10 except the part of connection to the second wiring layer. A polycrystalline Si layer 13 serving as the second wiring layer is formed on the upper surface thereof.
申请公布号 JPS5956760(A) 申请公布日期 1984.04.02
申请号 JP19830153280 申请日期 1983.08.24
申请人 HITACHI SEISAKUSHO KK 发明人 TAKECHI MAKOTO;KAWAMOTO HIROSHI
分类号 H01L27/10;H01L21/8234;H01L23/522;H01L27/06;H01L29/78 主分类号 H01L27/10
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