发明名称 DETECTING CIRCUIT OF CLOCK PULSE
摘要 PURPOSE:To detect the deterioration of pulses and to switch a current clock generator to a spare one by comparing the pulse width of a clock pulse with the pulse width of a signal generated from a monostable multivibrator. CONSTITUTION:A clock generated from the current clock generator 1 is supplied to a PCM transmitting device 3 through a switching circuit 2. The clock is also supplied to the monostable multivibrator 5. The monostable multivibrator 5 is triggered by the clock and generates a pulse signal with the pulse width narrower than the clock. A clock from the clock generator 1 is inputted to a clock input terminal C of a D-type FF and a pulse sinal from the monostable multivibrator 5 is inputted to a clear terminal CLE. When the clock is deteriorated and the pulse width is narrower than the output of the monostable multivibrator 5, the D-type FF 7 generates an output signal to drive the switching circuit 2 and switch the clock generator 1 currently used to a spare one 9.
申请公布号 JPS5955620(A) 申请公布日期 1984.03.30
申请号 JP19820166114 申请日期 1982.09.24
申请人 FUJITSU KK 发明人 NAKADE HIROSHI;OGISO MASAAKI;KAJIWARA MASANORI
分类号 H03K5/153;H03K5/26 主分类号 H03K5/153
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