| 摘要 |
The semiconductor substrate (1) which can be of p-type silicon has its surface covered with a silicon oxide layer divided into thick and thin zones, and incorporating contact openings (7). Below the oxide layer are n-type source and drain regions (5,6). Above the oxide layer is a gate zone (8) formed by portions of different conductivity type polycrystalline silicon. This has a central zone (9c) of the same conductivity type as the substrate between two parallel zones (9a,9b) of the opposite conductivity type. The gate zone connects a short extension of the drain region with an extension of the source region, the latter adjacent to a contact opening. The transistor has a large channel resistance and can be used to load the memory circuit.
|
