| 摘要 |
A circuit for changing the frequency of a pulse train (10) in response to a change in the average value of an applied digital signal (18) applies the signal to be changed to a pulse subtractor (12). Application of a predetermined number of digital data signals of one sign causes the periodic subtraction of a pulse at the subtractor (12), thus reducing the average frequency at the output from the pulse subtractor (12). The signal at the output from the subtractor is applied to a pulse adder (14) which adds a pulse to the subtracted pulse train in response to a predetermined number of data pulses of the opposite sign. The output pulse train (16) is thus varied in frequency in response to variation in the average value of the digital data input. The order of addition and subtraction may be reversed. |
