| 摘要 |
PURPOSE:To avoid malfunction and an oscillating action, by inhibiting the working of an address transition detector circuit, etc. while data is delivered from an output buffer. CONSTITUTION:The rise of a pulse phiS which has a rise with the end of a bit line precharge signal is detected by a rise detecting circuit 71 consisting of inverters 72-74, an NAND gate 16, etc. This output of detection and the output obtained via an inverter 75 turn on p type and n type transistors 78 and 77. As a result, the node A of an address transition detecting (ATD) circuit is set at a high level for a period during which the data ise delivered from an output buffer. While the output phii of the ATD circuit is kept at a low level, therefore the ATD circuit does not work substantially. This can prevent malfunction and an oscillating action even though the noise generated from the output buffer are put on a power supply line. |
