发明名称 RECORDING CIRCUIT
摘要 PURPOSE:To prevent assuredly the generation of a reproduction error despite a variable speed reproduction mode, by providing a signal converter which performs the partial response equalization only to a recording circuit. CONSTITUTION:A digital signal Sa is converted into another digital signal Sd and also supplied to a signal converter 30 which performs partial response equalization. A partial response equalized ternary equalized signal Sg is delivered from the converter 30 and recorded on a tape 31. Then the reproduced signal Sg is reproduced to a digital signal via a preamplifier 16, etc. The converter 30 is provided only to a recording circuit 10A, and therefore the signal Sa can be always reproduced assuredly regardless of the tape speed. This can prevent assuredly the generation of a reproduction error despite a variable speed reproduction mode.
申请公布号 JPS5954011(A) 申请公布日期 1984.03.28
申请号 JP19820164356 申请日期 1982.09.21
申请人 SONY KK 发明人 MORIYA RIYUUSUKE
分类号 H04L25/497;G11B5/09;G11B20/10 主分类号 H04L25/497
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