发明名称 Sample and hold circuit with improved offset compensation
摘要 The auto-zeroing technique of this invention comprises two steps. In the first step, the differential amplifier output and negative input are shorted together and the resulting amplifier offset output voltage is stored across an input capacitor and a feedback capacitor, the input capacitor being connected between the amplifier negative input and a voltage source to be sampled and the feedback capacitor being connected between the amplifier negative input and ground. In the second step, the direct connection between the amplifier output and negative input is removed and the feedback capacitor is reconnected between the amplifier output and negative input in a feedback loop. At this time, a voltage of the same magnitude and opposite polarity as the original amplifier offset output voltage is applied as negative feedback across the amplifier, so that the amplifier offset output voltage is precisely zeroed. In an alternative embodiment, the connection and reconnection steps are performed at a frequency fc so that the device functions as a switched capacitor integrator.
申请公布号 US4439693(A) 申请公布日期 1984.03.27
申请号 US19810316453 申请日期 1981.10.30
申请人 HUGHES AIRCRAFT CO. 发明人 LUCAS, CHARLES H.;LEWYN, LANNY L.
分类号 G06G7/186;G11C27/02;(IPC1-7):G11C27/02 主分类号 G06G7/186
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