发明名称 |
INTEGRATED CIRCUIT FOR DETECTING POWER FAILURE AND ITS RECOVERY |
摘要 |
<p>PURPOSE:To attain an interlock function between a microcomputer power supply and another power supply, by using a reset signal. CONSTITUTION:A commercial power supply VinA is transmitted through a rectifying/smoothing part 7, and the output of the part 7 is compared with a microcomputer power supply VCC at a comparing part 1. A control part 2 applies a control signal properly to a delay introduction counter part 3 in response to the output given from the part 1. The part 3 counts the clock pulses given from a clock pulse oscillating part 4 under the control of the part 2 and supplies selectively the output of pulse counting to an output part 6. The part 6 receives the signal from the part 3 and delivers a reset signal and a power failure detecting signal PDOWN as output signals. The reset signal has a rise after the VCC is fixed and then a fall before interruption of the VCC. Therefore an interlock is possible between the VCC and another power supply by supplying the reset signal to another power supply switch 11.</p> |
申请公布号 |
JPS5952325(A) |
申请公布日期 |
1984.03.26 |
申请号 |
JP19820162047 |
申请日期 |
1982.09.17 |
申请人 |
FUJI DENKI SEIZO KK |
发明人 |
KAWASAKI KIKUO;YOSHIDA KAZUO |
分类号 |
G06F1/30;G06F1/26;G06F1/28 |
主分类号 |
G06F1/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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