发明名称 SEMICONDUCTOR MEMORY ARRAY
摘要 PURPOSE:To equalize the capacitance of all data lines by connecting the surface section of a semiconductor substrate of the same shape as an accumulating section to a diffusion layer kept at fixed potential in voids generated at one terminal of an even number data line and the other terminal of an odd number data line. CONSTITUTION:The accumulating sections such as S33 and S34 are formed symmetrically regarding a contact hole H31, and the void corresponding to one memory-cell is generated as seen in the left end of a data line such as a data line D3. The surface section A3 of the semiconductor substrate of the same shape as the accumulating section S34 in the void is connected electrically to the diffusion layer I1, which is kept at fixed potential and surrounds the periphery of a memory array. Likewise, the surface section A2 of the semiconductor substrate in the void generated at the right end of a data line D2 is connected to the diffusion layer I2 on the right side. Accordingly, not only the capacitance of all data lines can be equalized but also the capacitance of word lines W1 and W2 is equalized, and the effect of the signal disturbance of the peripheral section of the array can be reduced.
申请公布号 JPS5951562(A) 申请公布日期 1984.03.26
申请号 JP19830146612 申请日期 1983.08.12
申请人 HITACHI SEISAKUSHO KK 发明人 KAMIGAKI YOSHIAKI;MASUDA HIROO;HORI RIYOUICHI;ITOU KIYOO
分类号 G11C11/401;H01L21/8242;H01L27/10;H01L27/108 主分类号 G11C11/401
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