| 摘要 |
<p>PURPOSE:To simplify the constitution of hardware for an FFT device using a pipeline type operator, by using the operator only for an operation to known non-zero value data. CONSTITUTION:While an operator 9 is carring out the butterfly processing of the 1st one between two stages, an input data selector 8 selects a bus 11 in the form of an input data, and an output data switch device 10 selects an output bus 11. As a result, the arithmetic results of butterfly processes (1)-1 and (1)-2 are stored in a data buffer 13 to be used to the input data of the next butterfly processes (1)-3 and (1)-4. At the same time, the operator P7 of the final 13th stage executes the butterfly operation to all data consisting of sets of 0 and non-0 data. An input data selector 8 of the operator P7 reads the data out of a 0 data ROM12 in the form of the output result of an operator at a preceding stage. The Fourier conversion data are obtained for the 8192 units of the input data, for example, if the outputs of the operator 9 are arranged.</p> |
