发明名称 HOT ELECTRON TRANSISTOR
摘要 PURPOSE:To prevent the electrons, entering a base layer tunneling through a barrier layer from an emitter layer, from passing the AlGaAs layer having no barrier effect by a method wherein a non-doped GaAs layer is provided between an Al0.3Ga0.7As barrier layer and a GaAs base layer located on the emitter side, and the potential inclination by emitter bias is formed by the Al0.3Ga0.7As barrier layer and the GaAs layer. CONSTITUTION:An N-type GaAs collector layer 2, an AlGaAs barrier layer 3, an N-type GaAs base layer 4, a GaAs layer 5, an AlGaAs barrier layer 6 and an N-type GaAs emitter layer 7 are epitaxially grown successively on an N-type GaAs substrate 1. Then, an emitter region is defined by selectively performing an etching treatment on the layers 5 and 7. Subsequently, an emitter electrode 10, a base electrode 9 and a collector electrode 8 are provided using gold-germanium-gold. The layer 6 or the layer 5 is normally formed in such a manner that the thickness of the lower end of the conduction band becomes equal to the Fermi level EFE of the layer 7 in the vicinity of the interface between the layers 6 and 5 when the prescribed emitter bias VBE is applied.
申请公布号 JPS62137867(A) 申请公布日期 1987.06.20
申请号 JP19850278012 申请日期 1985.12.12
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 MUTO SHUNICHI
分类号 H01L29/68;H01L29/20;H01L29/76 主分类号 H01L29/68
代理机构 代理人
主权项
地址