发明名称 PLL CIRCUIT
摘要 PURPOSE:To apply a control voltage and a frequency of a reference oscillator for VCO and product detection of a multi-band PLL control to a VCO, by comparing the phase of an output of a programmable frequency divider with a reference oscillation frequency or a divided-frequency. CONSTITUTION:A VFO output for frequency adjustment and a parameter oscillating output of a fixed frequency are mixed at a mixer M2, only a required frequency of sum/difference frequencies passes through a BPF and is given to a mixer M1 in the PLL circuit to control the VCO frequency. The PLL circuit is provided with the 3rd mixer M3 mixing the frequency-divided output of a reference oscillator and a frequency divided from the parameter oscillator. The frequency through the 3rd mixer M3 is applied to a mixer at the post-stage of a receiver or a product detector. Further, the control voltage is applied to the VCO and the frequency of the reference oscillator is supplied for VCO and product detection of the multi-band PLL control.
申请公布号 JPS5950617(A) 申请公布日期 1984.03.23
申请号 JP19820161464 申请日期 1982.09.16
申请人 YAESU MUSEN KK 发明人 AKIYAMA KOUJI
分类号 H03L7/16;H03D1/22;H03L7/18;H03L7/23 主分类号 H03L7/16
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