| 摘要 |
PURPOSE:To attain automatic equalization without using a tapped delay line, by arranging a primary circuit network comprising capacitors and resistors in parallel in the direction of signal propagation and controlling the amplitude of each primary circuit network so as to add an output after control. CONSTITUTION:The primary circuit networks comprising resistors R and capacitors C are arranged in parallel with a signal input terminal 1 in the direction of signal propagation and the outputs are added at an adder 5 via tap weighting coefficients d1-dm. The output of the primary circuit networks and the output of an identification discrimination section 7 are inputted to a matrix operating section 10 so as to decide directly m-set of the tap weighting coefficients d1-dm. Further, the output of the primary circuit networks is multiplied with the weighting coefficients d1-dm and the result is applied to the identification discriminating section 7 via the adder 8. An output signal is obtained from an output terminal 2 of the discriminating section 7 and applied to an operating section 10 and the automatic equalization is attained with a simple constitution by using a tapped delay line. |
