发明名称 ARITHMETIC PROCESSING CIRCUIT OF SEQUENCE CONTROLLER
摘要 PURPOSE:To inhibit the processing in an unnecessary stage, by altering or converting the output of a stage counter according to the kind of an instruction and the contents of an arithmetic result register. CONSTITUTION:An arithmetic control part 2 reads an instruction code (k) in an FF4 by the input of a latch signal l. Then, values of instruction codes (c) and (d) are identified and a clear command is supplied to the stage counter 1 at the time of an instruction NOP (allowing no process in the step except the advance of only the address counter of a program memory). Then, an advance to the next instruction fetch is made. The output (a) of the counter 1 is raised to ''1'' at the time of an instruction accompanying the input or output of external control data. The control part 2 sends out an operation mode code which means the input or output as an output (a) according to the condition between outputs (a) and (c) to perform specific operation. At the time of a conditional jump instruction, processing is performed according to the values of the output (a) of the counter 1 and the output (c) of the FF4.
申请公布号 JPS5949644(A) 申请公布日期 1984.03.22
申请号 JP19820159483 申请日期 1982.09.16
申请人 HITACHI SEISAKUSHO KK 发明人 FUJIWARA KATSUHIRO;OKAMURA KOUSUKE
分类号 G06F7/00;G05B15/02;G05B19/05;G06F9/302;G06F9/32 主分类号 G06F7/00
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