| 摘要 |
A data storage system having a charge coupled device (CCD) shift register and a detection circuit for detecting the binary value represented by the charge level or signal within each cell location of the CCD shift register. The detection circuit includes a sense amplifier for comparing the signals from two adjacent cell locations, with one signal representing a known binary value. The comparison of adjacent cell locations compensates for signal losses during shifting, since the losses experienced by adjacent cell locations are nearly identical. Switching transistors cause an adjustment voltage to be added to one of the signals prior to comparison. The output of the sense amplifier is provided to a flip-flop, which in turn has an output initially set at the known binary value and which controls the switching transistors. |
