发明名称 DYNAMIC RAM CONTROLLER
摘要 PURPOSE:To reduce the refresh requesting frequencies, by controlling the refresh after constituting a timer with an RAM and an incremental circuit and then making use of the locality and continuity of a von Neumann computer program. CONSTITUTION:A timer is constituted with an RAM 6 of a register corresponding to each refresh address number of a dynamic storage device and an incremental circuit 7. A register of a refresh address received an access is reset via the circuit 7. While the register of an address received no access is periodically clocked and decided via the circuit 7, and a refresh request is delivered from the circuit 7 to an address which reaches a fixed value. These registers are connected to a von Nenmann computer. Thus the access receiving probability is increased during an operation of a program for a row address to be refreshed. As a result, both locality and continuity of a von Nenmann program are used at their maximum. This reduces the refresh requesting frequencies and increases the processing speed of a dynamic storage device.
申请公布号 JPS5948894(A) 申请公布日期 1984.03.21
申请号 JP19820157460 申请日期 1982.09.10
申请人 NIPPON DENKI KK 发明人 MIZUNO MASATOSHI
分类号 G11C11/406;G11C11/34;(IPC1-7):11C11/34 主分类号 G11C11/406
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