发明名称 WAVEFORM SHAPING CIRCUIT
摘要 PURPOSE:Tu ensure an accurate waveform shaping operation despite a large waveform distortion of an input signal, by superposing the output of a comparator on a binary input signal after integrating it under the prescribed conditions and making a binary decision by the optimum threshold voltage in accordance with a DC bias signal supplied from an itnegration circuit. CONSTITUTION:A CMOS inverter has the characteristics as shown in the diagram, and a comparator 36 gives a binary decision to a signal 204 with the 2.5V threshold voltage. If the duty ratio of an H level signal is set at about 40% for an output signal 206, the average voltage VE of the signal 206 is equal to 2V. The integration voltage VD of an integration circuit 32 is turned into a bias signal 202 and then superposed on a signal 200. The voltage 204 increases as the voltage VD increases. When the voltage of the signal 202 increases, the reference voltage VT1 of an inverter 38 drops relatively to the signal 200. Then the H level duty ratio increases for a waveform shaped signal delivered from an inverter 40. This operation is repeated to obtain stability with a 50% duty ratio. The threshold volage VT1 with which the comparator 36 performs a binary decision is relatively set at an optimum level by the increase and decrease of the input signal 200. Thus it is possible to shape the wave form automatically regardless of the waveform distortion.
申请公布号 JPS5949014(A) 申请公布日期 1984.03.21
申请号 JP19820159873 申请日期 1982.09.14
申请人 MITSUBISHI DENKI KK 发明人 ITOU TAKASHI;MORITA YOUICHI
分类号 H03K5/007;H03K5/08;H03K5/156 主分类号 H03K5/007
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