| 摘要 |
PURPOSE:To secure the effective channel length and largely improve MOS FET withstand voltage by sufficiently enlarging the radius of curvature of the junction of source-drain regions by a method wherein an impurity is introduced into a substrate in the state that the gate region is coated with a coat glass. CONSTITUTION:A field oxide film 22 is grown on the Si substrate 21, further a gate oxide film 23 is grown by dry oxidation, poly Si is deposited by CVD method, and then the gate 24 is formed by photoetching method after the thermal diffusion of phosphorus. Next, the coat glass is spincoated, resulting in a coat glass layer 25 whose section at the gate side part inclines, the coat glass layer 25 on the gate oxide film 23 and the gate 24 is removed by etching with fluoric acid, arsenide is implanted, and accordingly an arsenide diffused layer 26 is formed. The radius of curvature at the end part of the arsenide diffused layer 26 can be enlarged to 1mum or more, and therefore the junction withstand voltage can be largely improved to 26V. |
