发明名称 FLIP-FLOP CIRCUIT
摘要 PURPOSE:To apply reset to a flip-flop circuit, by connecting a diode in parallel to a resistor of a time constant circuit, and discharging rapidly a charging voltage of a capacitor at the momentary interruption of power supply. CONSTITUTION:An FF circuit 1' of circuit-integrated configuration consists of an FF circuit 2 and a reset circuit 3'. An output of the time constant circuit 4' comprising RC connected in series with the power supply is inputted to a comparator 5. When the power supply is turned on, the capacitor C is charged with the time constant of RC and when the voltage reaches a charging voltage Vs, a pulse 6 is outputted from the comparator 5 as a reset pulse, which resets the FF circuits 2. If there exists momentary interruption of the power supply Vc, the voltage Vc charged in the capacitor C is discharged via a diode 7 in a short time. When the capacitor C is charged by the voltage Vs at a time t1 after time T, the FF circuit is reset by the reset pulse 6.
申请公布号 JPS5947831(A) 申请公布日期 1984.03.17
申请号 JP19820157518 申请日期 1982.09.10
申请人 FUJITSU KK 发明人 MATSUMURA MASASHI
分类号 H03K3/037 主分类号 H03K3/037
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