| 摘要 |
PURPOSE:To speed up partial writing operation by writing data in either of storage array whose check bits in partial writing are not used in a cycle different from data bits. CONSTITUTION:Two check bit storage arrays 301 and 302 of a storage array 101 select a current address from an address circuit 11 and an old address from an address holding circuit 8 according to set information in a selection information register 6 by a directory 5 through selecting circuits 1 and 2 respectively. Then, the reading of a data bit storage array 201 after partial writing and the writing of partially written data are performed. On the other hand, a check bit regarding the written data corresponding to the old address passed through a written data holding circuit 7, check bit generating circuit 31, etc., is written in the unused array 320 in response to the old address. Thus, the check bit is written in the cycle different from the data bit, so the partial writing is carried out in the same consuming time with writing or reading and speeded up. |
