System bus protocol interface circuit

摘要

The present invention provides a bus protocol interface circuit for the peripheral units that prevents a conflict in bus requests between the peripheral units and permits bipolar drivers to be used for fast operation. The interface circuit comprises a logic means coupled to the bus acknowledgment line input terminal and the bus acknowledgment line output terminal for generating a logic output signal responsive to the signals on the bus acknowledgement line input and output terminals, and latching means coupled between the bus request line and the bus request line terminal, and further connected to the output of the logic means and the bus acknowledgment line output terminal, for latching into a state consistent with a bus request signal from any one of the peripheral units and for unlatching from the consistent state upon receipt of a bus acknowledgment signal in response to the bus request signal.