| 摘要 |
An interface circuit for producing output signals of first and second levels in response to input signals intermediate said first and second levels. The circuit includes a controllable impedance means, normally set to a high impedance condition, connected in series with a first insulated-gate field-effect transistor (IGFET) between a first power terminal and an output terminal and a second IGFET of complementary conductivity to said first IGFET connected between the output terminal and a second power terminal. In response to an input signal having a value to turn-on the second IGFET, the output terminal is driven to the voltage at the second power terminal and the first IGFET is set to an off condition, conducting at most the current flowing through the controllable impedance means set to its high impedance condition. In response to an input signal of a polarity and magnitude to turn-on the first IGFET and turn-off the second IGFET, a pulse generator coupled between the output terminal and the controllable impedance means momentarily places the controllable impedance means in a relatively low impedance condition and charges the output terminal to the voltage at the first power terminal.
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