| 摘要 |
PURPOSE:To prevent erroneous output and to shorten a processing time, by providing two multiprocessor systems wherein an arithmetic control part and an input/output control part are put in function charge of different CPU elements in parallel, and collating data of their input/output control parts with each other simultaneously with transfer. CONSTITUTION:Data inputted 16 from an external contact 18 is inputted to input/output control part I/Os 11 and 12 in parallel. The I/Os 11 and 12 transfer the data to arithmetic control parts 13 and 14 respectively and arithmetic results are inputted to the I/Os 11 and 12, passed through an output switching part 15, and outputted from either one (I/O 11 is shown in figure) to an external terminal 19 through an output part 17. A detector which is not shown in the figure makes a comparison between both systems every time the data is transferred in the order of the input part 16, I/Os 11 and 12, arithmetic control parts 13 and 14, I/Os 11 and 12, and output part 17; when a dissidence is found, an alarm is outputted and the selection of the output switching part 15 is controlled to perform switching to a normal system. Consequently, a processing time in case of fault occurrence is shortened and erroneous output is prevented. |
