发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To improve the integration of a semiconductor memory device by forming a buried layer of an isolation region, thereby substantially reducing the width of the buried layer to enhance the concentration of a current at the wiring time. CONSTITUTION:An isolating region 12 is formed in a structure that a dielectric material 14 is buried in a deep groove 13 formed on an Si substrate 9. Reactive ion etching is used, the groove 13 is substantially vertically cut to substantially reduce the width of an N<+> type buried layer 11. The inside of the region 12 becomes an element forming region, and two bipolar transistors Tr are formed. Each transistor Tr is formed of an emitter 15, a base 16 and a collector 17 in this order from the surface in a vertical shape in such a manner that the collector contact 18 is made common.
申请公布号 JPS5943566(A) 申请公布日期 1984.03.10
申请号 JP19820153878 申请日期 1982.09.06
申请人 HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK 发明人 OKUDA NORIYOSHI;OONO NOBUHIKO;UCHIDA AKIHISA;OGIUE KATSUMI
分类号 G11C17/06;G11C17/14;H01L21/331;H01L21/8229;H01L27/102;H01L29/73 主分类号 G11C17/06
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