发明名称 LIMITING AMPLIFIER
摘要 PURPOSE:To decrease the harmonic of even order number, by changing a DC bias voltage given to a limiting amplifier circuit in response to the amplitude of an input signal to bring an output of the limiting amplifier to 50% duty of DC level. CONSTITUTION:When the amplitude of an input signal is small, an amplitude detecting circuit 10 gives a detected output of a comparatively low voltage to a variable DC voltage source 11. Thus, the voltage source 11 gives a DC bias voltage comparatively low to an adder circuit 12 in response to the detected output. The circuit 12 superimposes a DC bias voltage on the input signal and gives the result to the limiting amplifier circuit 1. A DC bias voltage in response to the amplitude of the input signal is added to the DC bias voltage given in advance at the circuit 1. Then, the DC bias voltage according to the amplitude of the input signal is given to the circuit 1. Since the DC bias voltage is changed in response to the input signal, the operating point of the circuit 1 is changed in response to the DC bias, the duty of the outputted waveform at the DC level is brought to 50%, allowing to reduce the even order harmonic.
申请公布号 JPS5943617(A) 申请公布日期 1984.03.10
申请号 JP19820154416 申请日期 1982.09.02
申请人 MITSUBISHI DENKI KK 发明人 MURAKAMI MITSURU;KOJIMA MASANORI
分类号 H03G11/00 主分类号 H03G11/00
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