发明名称 FAILURE DETECTING CIRCUIT OF TIME DIVISION EXCHANGE CIRCUIT
摘要 PURPOSE:To detect a failure with a simple circuit constitution without reducing the transmission efficiency of information, by producing a parity bit from one frame information again after the exchange of one frame information, and comparing both parity bits. CONSTITUTION:When one frame information is developed at a gate matrix 5 from an incoming shift register 4, the information is multiplied with a value of an F/F group 10 for multiple connection indication which indicates commanding multiple connection(even number) corresponding to each channel, and the result is stored in a control shift register 11. Further, the number of ''1s'' of parity bit control information stored in the parity bit control shift register 11 is counted at a parity bit control circuit 13, and only when the value is an odd number, the parity bit produced at an output side parity bit producing circuit 14 is inverted, the value and the parity bit of parity bit storage circuit 12 of the incoming side are compared for attaining parity check.
申请公布号 JPS5940750(A) 申请公布日期 1984.03.06
申请号 JP19820150296 申请日期 1982.08.30
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 SUZUKI SHIGEFUSA;ARITA TAKEMI
分类号 H04M3/26;H04M3/24 主分类号 H04M3/26
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