发明名称 MANUFACTURE OF DUAL TRANSISTOR
摘要 PURPOSE:To contrive to shorten diffusion time and prevent the step-out of a resist layer or a vapor grown layer by a method wherein a high concentration region is formed on the region scheduled for forming isolation regions on the surface of the vapor grown layer, and thereafter etching is performed, resulting in the formation of mesa grooves. CONSTITUTION:The N type vapor grown layer 3 is formed on a P type Si substrate 1, and the N type high concentration buried layers 2a and 2b are formed. Next, P<+> diffused regions 11 are formed by diffusing e.g. boron into the region scheduled for forming isolation regions on the surface of the layer 3. Then, when plasma etching is performed by photoetching, tapered mesa etching shapes can be obtained by the concentration gradient of the P<+> diffused regions. P<+> diffusion for forming isolation regions 13 is performed. The isolation regions 13 connected to the substrate 1 are formed by this diffusion. This method enables to shorten the diffusion time for forming isolation regions. At the time of forming grooves, the taper at approx. 45 deg. can be obtained. Thereby, in the case of adhering a resist layer of a vapor grown layer by later processes, the generation of step-cuts on these layers does not occur.
申请公布号 JPS5940564(A) 申请公布日期 1984.03.06
申请号 JP19820149994 申请日期 1982.08.31
申请人 TOKYO SHIBAURA DENKI KK 发明人 MITANI TATSUROU;ISHII TETSUO
分类号 H01L21/8222;H01L21/331;H01L27/08;H01L27/082;H01L29/73 主分类号 H01L21/8222
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