发明名称 INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To enhance the withstand voltage of a gate oxide film by a method wherein rounding having a radius of curvature over the specific value of the thickness of the gate oxide film is provided at the bottom and shoulder corners of a groove, in order to alleviate field concentration, when a channel region which composes an IGFET is isolated by a V-shaped groove. CONSTITUTION:A p<+> type channel forming region 2 and an n<+> type source region 3 are laminated and formed on an n<-> type drain region 1a, the entire surface is covered with a mask 10, an aperture is bored, and then the V-shaped groove 9 which goes into the region 1a is formed by anisotropic etching. Next, a part of the mask 10 is removed, resulting in the exposure of the shoulders 8 of the groove 9, thereafter, an oxide film 11 is generated on the surface of the groove 9 and that of the region 3 by oxidation, and the sharp angles existent at the shoulders 8 and the bottom 7 of the groove 9 are changed into angles with rounding which has the radius of curvature of 10% or more of the thickness of the gate oxide film. Afterwards, the oxide film at stepwise difference part is thickened more than the gate oxide film 4 provided later by partially leaving the film 11 in the neighborhood of an aperture end 12, and the unnecessary film 11 is removed from the surface of the groove 9. Then, windows are opened by adhering the film 4 as normal, and gate and source electrodes 5 and 6 are mounted.
申请公布号 JPS5940579(A) 申请公布日期 1984.03.06
申请号 JP19820150283 申请日期 1982.08.30
申请人 KOGYO GIJUTSUIN (JAPAN) 发明人 SEKIKAWA TOSHIHIRO;HAYASHI YUTAKA
分类号 H01L21/336;H01L29/417;H01L29/423;H01L29/78 主分类号 H01L21/336
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