| 摘要 |
<p>39 PHN. 9652 A multiprocessor computer system is distributed over error-isolation areas, each of these areas containing a processor element, an encoder, a section of a memory and an information-reconstruction section which are connected in this order in a cyclic path. The processor elements work in parallel on the same data-word, which has a certain length. When the result of the processing has to be stored in the memory, each encoder forms a code-symbol of shorter length, on the basis of the data-word. The set of codesymbols formed on the basis of the data-word forms a codeword with a larger bit length than the data-word mentioned. By means of an error-correcting code at least one erroneous code-symbol in the code-word can be corrected. The code symbols are stored in the respective memory sections. If the data-word concerned has to be further processed, all corresponding code-symbols are fed to all informationreconstruction sections. Peripheral equipment can be connected in the cyclic path, with implementation of distinctive levels of redundancy.</p> |
