发明名称 Gold wire for semiconductor components.
摘要 Known gold and gold-alloy wires for connecting semiconductor chips to terminals on the lead frame often exhibit loop formations, drifts and excess lengths when automatically bonded. This is avoided if at least 50% of the crystallites in the wire have a preferred orientation in the axial direction corresponding to a &Lang&100&Rang& fibre structure.
申请公布号 EP0101592(A2) 申请公布日期 1984.02.29
申请号 EP19830107764 申请日期 1983.08.06
申请人 DEMETRON GESELLSCHAFT FUER ELEKTRONIK-WERKSTOFFE M.B.H. 发明人 RUSBUELDT, VOLKER, DR., DIPL.-ING.;SCHLAMP, GUENTHER, DR., DIPL.-CHEM.;MARTIN, WOLFRAM, DR., DIPL.-PHYS.
分类号 C22C5/02;B23K1/00;H01L21/60;H01L23/49 主分类号 C22C5/02
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