发明名称 CONTROL METHOD FOR HARDWARE TIMER
摘要 <p>PURPOSE:To improve the throughput of a system by using the hardware function to perform the request for start of a timer, the control of the timer and the management of the timer and therefore omitting a fixed interruption for control of the timer and also decreasing the generating frequency of instructions. CONSTITUTION:The set value of a timer is set to a register 12 with the first timer start request and a counter 11 starts its action. If no timer start request is received while the counter 11 is working, an interruption request is produced from a comparator 14 when the count value of the counter 11 reaches the set value. While the count value is subtracted from the set value of the register 12 and the remaining time value is obtained when a timer start request is received during the working of the timer 11. Then the obtained time value is compared with the timer set value obtained by a new timer start request. If the new set value is smaller than the old set value, the timer set value stored in the register 12 is saved temporarily, and the count value of the timer 11 is added to the value set newly by a timer start request. Thus the new set value is set to the register 12.</p>
申请公布号 JPS62152044(A) 申请公布日期 1987.07.07
申请号 JP19850291976 申请日期 1985.12.26
申请人 TOSHIBA CORP;TOSHIBA COMPUT ENG CORP 发明人 NANBA SUSUMU
分类号 G06F9/48;G06F1/04;G06F1/14;G06F9/46;G06F11/30 主分类号 G06F9/48
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