发明名称 FORMING CIRCUIT OF INITIALIZING SIGNAL
摘要 PURPOSE:To obtain an initializing signal forming circuit suitable for an IC, by forming a minute-capacity capacitor internally and controlling the charging of the capacitor by a switching element which is controlled by the amplitude of oscillation. CONSTITUTION:When several hundred ms elapse after power-on, the oscillation of an oscillating circuit (consisting of Xtal, G1 and R) which becomes the steady oscillation state after the elapse of a certain time from power-on is increased gradually, and the output becomes L when the oscillation exceeds the threshold level of an inverter G2. The first FETP1 is turned on, and a capacitor C is charged with a prescribed time constant, and a voltage Vc of the capacitor C rises; and when it exceeds the threshold level of an inverter G5, a set signal becomes L to make a reset signal effective, and an initializing signal In is changed from H to L to terminate the initialization. Consequently, a CR time constant circuit for initialization is unnecessary in the external of the IC, and the reliability is improved considerably.
申请公布号 JPS5936416(A) 申请公布日期 1984.02.28
申请号 JP19820146645 申请日期 1982.08.24
申请人 YASHIKA:KK 发明人 MURAMATSU SADAO
分类号 H03K3/02;H03K17/22 主分类号 H03K3/02
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