发明名称 SEQUENCE CONTROLLER
摘要 PURPOSE:To perform sequence operation successively to a state before the supply of a control signal from an input/output control part to an output part is inhibited, by providing an output inhibiting circuit which inhibits said control signal supply. CONSTITUTION:The output inhibiting circuit 10 consists of a storage device 11 and a logical gate 12. Then when the storage device 11 inputs and stores an output inhibition instruction, the logical gate 12 is closed by a storage device output signal to inhibit the transmission of the control signal from the input/output control part 5 to the output part 7. When it stores an output inhibition resetting instruction, on the other hand, the logical gate 12 is opened to permit the transmission of the control signal from the input/output control part 5 to the output part 7. Thus, the output inhibiting circuit is provided to perform the sequence operation successively to the state before the inhibition.
申请公布号 JPS5935209(A) 申请公布日期 1984.02.25
申请号 JP19820145120 申请日期 1982.08.20
申请人 KOUYOU DENSHI KOGYO KK 发明人 TOYOOKA KATSUJI;SHIGEMATSU HISASHI
分类号 G05B9/02;G05B19/048;G05B19/05;G05B23/02;G06F9/30 主分类号 G05B9/02
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